Notes

1. Triggering in Data Acquisition

Data acquisition needs are often more complex than simply starting data collection at some initial time t and terminating the collection at some fixed time later. In many practical situations, the data collection process is complicated by the following factors:

1. The time when the triggering event will occur is unknown.
2. Data PRECEDING the trigger is to be recorded as well as data following the trigger.

Examples which come to mind include:

The measurement of data in the seconds (or hours) leading to an earth tremor, or to a breakdown in a mechanical system.
The study of a subject's sleep patterns in the minutes or hours before his waking up.

The simplest approach to these data acquisition problems is to establish a circular buffer on the hard disk for recording the pretrigger data and a standard linear buffer for the posttrigger data. The size of these buffers will depend upon the sampling rate, the number of collection channels, and the recording time interval. For example, recording 1 minute of 16 bit data on a single channel at 200 kHz will require 24 MBytes of disk space. It should perhaps be mentioned at this point that a DSP based acquisition board might be used for on-the-fly data compression, saving disk space and reducing the throughput load on the host PC. The data acquisition program continually writes to the circular buffer (new data overwriting the old) until the arrival of the triggering event. The data following the trigger is then recorded. The last housekeeping step creates a single data file with both the pre and post trigger data.

Using Dalanco Spry's data acquisition program (sometimes called MODA, for Manager of Data Acquisition), one might study one's early morning sleep activities in the following way:
1. Set the pretigger acquisition time to 600 seconds.
2. Set the posttrigger acquisition time to some number of interest.
3. Start the recording process by clicking on BEGIN. The computer will spend the night writing to the circular buffer.
4. Turn on the snoreommeter (or other sensor) to your board.
5. Go to sleep.
6. In the morning when waking up, click on TRIGGER. The posttrigger data and 10 minutes of pretrigger data are stored to a file in the correct order.

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2. PCI Data Transfer Options for the AVR/BVR series boards

There are several techniques for transferring data across the PCI bus to and from the AVR/BVR boards. An understanding of what is involved in using each of these techniques is helpful in the design phase of your application.

But first, we'd like to contribute an acronym, ONBI, to the technical literature. ONBI refers to onboard intelligence, which, in the case of the AVR/BVR boards, means either the TI DSP or the Xilinx Virtex FPGA.

The data transfer modes are:

1) Slave

2) Master

3) DMA

4) Mailbox

In the Slave mode, the AVR/BVR is accessed by the Host PC processor or by the current PCI Bus master (which may be another AVR/BVR board). This is the most intuitive mode, similar to the Host PC processor's access of an ISA board. Code examples are numerous and may be found on just about every C listing on the distribution CD: the reading and writing of AVR/BVR memory (either single Byte or DWORD or block move instructions), programming of the Flash memory and DDS, FPGA configuration, etc...

In Master mode, the AVR/BVR is the temporary master of the PCI Bus, and the ONBI may access the Host PC's system memory, IO, as well as other addin cards. The ONBI may pass data to, and control other boards! Master mode may be thought of as Slave mode in reverse. When writing to system memory, be sure that it is correctly allocated and that the ONBI knows the address to access. Interesting applications ideas are made possible by this capability. The example on the distribution CD may be found in the examples/busmaster subdirectory.

The DMA mode is often used for the transfer of long blocks of data between system memory and AVR/BVR memory. The controlling entity here is the PCI interface chip on the AVR/BVR board. It is programmed by the Host PC processor (or maybe by the current PCI Bus master) or by the ONBI with source and destination addresses, the direction of the data transfer, and the byte count. Once the transfer is set, no further intervention by the ONBI or Host PC processor is needed. A flag is set, and an interrupt may optionally be generated when the transfer has completed. This mode is fast. Examples are in the examples/dma subdirectory.

The Mailbox registers on the PCI interface chip are convenient for passing small amounts of data, for example, a status word, between the AVR/BVR board and the PC Host processor or current PCI Bus master. This transfer method has the advantage of not using memory, and may be associated with an interrupt. See the examples/intmail subdirectory.

Transfer rate tests were conducted for the Slave and DMA modes on a 400 MHz Pentium II system. Results will vary not so much with CPU speed, but with PC motherboard chipset and its settings. In each case 64 KBytes were transferred across the PCI Bus.

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3. Data Acquisition with the Model AVR-32 or Model BVR-32

Data Acquisition consists of the Record and Playback functions, which are defined as follows:

Record - The transfer of data from the analog input channel to hard disk on a continuous basis with no gaps.

Playback - The transfer of data from hard disk to the analog output channel on a continuous basis with no gaps.

Two hard disk configurations may be used with the Model AVR-32 or Model BVR-32:
1. Using a hard disk connected to the host system's mainboard. This is the standard approach.
2. Using a hard disk connected directly to the Model AVR-32/BVR-32.

The second configuration has several advantages:
1. No impact on computer operations. The performance of the operating system and other applications are not affected.
2. Much higher sampling rates are possible with a hard drive dedicated to data acquisition tasks. See the table below for performance examples.
3. Scalability - Two hard drives may be connected to each Model AVR-32/BVR-32. Multiple Model
AVR-32/BVR-32 boards may be used in a single computer. All without reducing PC system performance.


Data Acquisition Performance Examples:

These performance figures should serve only as a guide.

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4. Pulse Generation with the Model AVR-32 or Model BVR-32

The D/A converter or TTL output on the AVR/BVR series boards may serve as outputs in pulse (or more complex waveform) generator applications.

As with many applications using the AVR/BVR series boards, system designers can choose the engine mix driving the application: DSP or FPGA, or, as is very often the case, some combination of the two.

In the pulse generation example, the output will be clocked by an available clock, usually generated by the onboard DDS (Direct Digital Synthesizer) The software used in the DSP approach will look familiar to those who have already programmed DSPs or even general purpose CPUs. One can expect a maximum output rate of 3 MHz (resolution of 333 ns).

The onboard FPGA is ideal for this kind of high speed, repetitive task. Use the programmable DDS, or the fixed 60 MHz clock, which would provide a resolution of 17 ns. With a 17 ns resolution and 40 bit counter, easily implemented in even the smallest FPGA, a pulse pattern may be implemented on a very long period. The design entry for this application is most easily done using the VHDL or Verilog languages. The source code will look reassuringly familiar to C programmers of DSPs and CPUs. Most importantly, performance will be increased by a factor of 20. The DSP is free for other functions, such as modulation or frequency shifting tasks.

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5. MODA 2 Data Acquisition Software: Progress Report

MODA 2 is the data acquisition program for the Model AVR/BVR series boards. It is unique in one major respect: the data collection is done on a dedicated 'private' disk connected to the AVR/BVR board's 50 pin connector via a ribbon cable.

The advantages of this approach are 1) the higher maximum speed, measured in samples/sec. at which data may be collected and 2) the data collection process does not clash with the Windows OS (or other OS), or other applications, for system resources.

How it works

A task file is created by the user, either by using a text editor or the task file editor. The task file specifies the function to be performed by MODA 2, as well as the parameters necessary to support that function.

Example

Here we are recording to private disk. Sectors 2 through 99711 on the private disk will be written to at the rate of 1 MSample/sec. Each sector holds 256 16 bit words. The signal source is the BINP analog input channel on the Model BVR-32. Since 2 hard drives may be connected to the AVR/BVR board, we have to specify that too. In this case we are using the first hard drive (harddrive = 0).

The taskfile generator simplifies data entry and checks for errors. As you can see, it allows for file length entry in units of time or number of samples to be collected, which are more intuitive units than 'sectors'.

Now that we have the data on private disk, how do we access it? You will undoubtedly want to access the data you've just collected with your data analysis tools. The copy_private_to_public function copies the designated sectors to a file on a harddrive in your Windows system. Be careful though. The 40 (or more) GBytes of data you may have collected on private disk may be too large to fit in a single file. You may need to divide your data into file sizes which are more manageable.

The playback and copy_public_to_private functions operate in similar fashion.

At this time, MODA 2 and the task file generator are available in a preliminary version which has the following limitations:

Record and Playback speeds limited to 1 MSample/sec. (2 MBytes/sec.)

Single channel operation only.

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